Running Verilog code on Linux/Mac

Step by step instructions to setup and install tools to run and visualize Verilog HDL designs on *nix systems.

Install

Note: The steps below have been tested on Ubuntu 16.04 and MacOS 10.14.

1. Compile from source on Linux/Mac or in Cygwin on Windows

You will need make, autoconf, gcc, g++, flex, bison to compile (and maybe more depending on your system).

Clone the git repo:

$ git clone https://github.com/steveicarus/iverilog.git

cd into the directory:

$ cd iverilog

Build configuration files:

$ sh autoconf.sh

If this gives autoconf.sh: line 10: autoconf: command not found, then install the needed packages.

On MacOS:

$ brew install autoconf automake libtool

On Ubuntu:

$ sudo apt-get install autoconf

A successful run should output:

Autoconf in root...
Precompiling lexor_keyword.gperf
Precompiling vhdlpp/lexor_keyword.gperf

Configure:

$ ./configure                        # for default settings - installs to /usr/local/bin
$ ./configure --prefix=<your directory>  # installs to specific directory provided

Compile the source:

$ make

This command will require gcc, g++, bison and flex. You can install them using Homebrew or apt-get on Mac and Ubuntu respectively.

Get into superuser mode and install:

$ sudo su
$ make install

2. Install on MacOS using Homebrew

$ brew install icarus-verilog

(Optional) Install iverilog waveform dumpfile viewer - gtkwave:

$ sudo port -v install gtkwave

If gtkwave installation gives Error: Failed to configure gtk-osx-application-common-gtk2: gtk2 +quartz not installed., do:

$ sudo port install gtk2 +quartz

3. Install on Ubuntu using aptitude

$ sudo add-apt-repository ppa:team-electronics/ppa
$ sudo apt-get update
$ sudo apt-get install verilog
$ sudo apt-get install gtkwave

Note: Windows binaries are available at http://bleyer.org/icarus/. For more details on installation, visit https://iverilog.fandom.com/wiki/Installation_Guide.

Run

Example 1: Hello World

Save this Verilog code as hello.v:

Compile using:

$ iverilog -o hello hello.v

Run the compiled executable:

$ vvp hello
Hello World!

Example 2: ALU

Save the code below as alu.v:

Save the code below as alu_tb.v:

Compile and run:

$ iverilog -o alu alu_tb.v alu.v
$ vvp alu +a=3 +b=2 +s=0
y= 5

Here s=0 selects the addition operation which is performed over a=3 and b=2. So the output y is 3+2=5.

Example 3: Counter with timing diagram using gtkwave

Save this code as counter.v:

Save this code as counter_tb.v:

Compile:

$ iverilog -o counter counter_tb.v counter.v

Run the executable:

$ vvp counter

Show the timing diagram:

$ gtkwave test.vcd &

Expand 'test' in the left sidebar and click on 'c1'. Then drag and drop 'out' reg on the signal viewing area.

gtkwave timing diagram output